Examples of non-volatile memory devices include a NAND-type flash memory (SSD or the like) and a resistance-change-type non-volatile memory (phase-change memories, ReRAM, or the like).
[(1) NAND-Type Flash Memory]
The NAND-type flash memory is utilized in a storage device such as SSD (Solid State Drive) and a memory card. The SSD made up of a plurality of NAND-type flash memories and a controller is utilized in, for example, server equipment, a laptop PC, or a netbook (notebook PC).
A NAND-type flash memory is described in, for example, Data Sheet of NAND-type flash (TC58NVG2S3ETA00) (Non-Patent Document 4). The NAND-type flash memory shown in Non-Patent Document 4 has an upper limit for an erase count, and the size of data write and the size of data erase are largely different from each other.
A method of controlling a NAND-type flash memory is disclosed in, for example, Japanese Unexamined Patent Application Publication No. 2008-146255, Japanese Unexamined Patent Application Publication No. 07-153285, Japanese Unexamined Patent Application Publication No. 2002-533810, and Japanese Unexamined Patent Application Publication No. 2004-240572 (Patent Documents 1, 2, 3, and 4).
The characteristics of the NAND-type flash memories are, for example: (1) the erase count of a memory region has an upper limit, (2) the size of data write (“page”) and the size of data erase (“block”) are largely different from each other, and (3) overwrite cannot be carried out (operation of collective write after read and erase are once carried out is required). Particularly, above-described (1) relates to the problem of the life of the device, and above-described (2) and (3) relate to the problem of inefficiency (processing efficiency) of, for example, data write.
[(2) Resistance-Change-Type Non-Volatile Memory (Phase-Change Memory or the Like)]
As the resistance-change-type non-volatile memory, a phase-change memory, a resistance-change memory (ReRAM: Resistive RAM), and others have been developed.
The characteristics of the phase-change memories are, for example: (1) the write count of a memory region has an upper limit, (2) the size of data write and the size of data erase are the same and small, (3) overwrite can be carried out, and (4) the resistance value of a memory cell (element) after data write may be varied. Particularly, above-described (1) relates to the problem of the life of the device, above-described (2) and (3) relate to the problem of efficiency (processing efficiency) of, for example, data write, and above-described (4) relates to the problem of instability (reliability) of, for example, data read.
As a data erasing operation in the phase-change memory, for example, as shown in FIG. 16, a reset pulse (1601) is uniformly applied to a target memory region from a control circuit, thereby equalizing the values of the target memory cells (resistance values) (for example, to storage information ‘1’).
Furthermore, as the techniques studied by the inventor of the present invention, for example, the following techniques are conceivable in a semiconductor device including the phase-change memory.
A storage element uses a chalcogenide material (or a phase-change material) such as Ge—Sb—Te based material or Ag—In—Sb—Te based material containing at least antimony (Sb) and tellurium (Te) as a material of a recording layer. A diode is used for a selective element. The characteristics of a phase-change memory (memory cell) using a chalcogenide material and a diode in this manner are described in, for example, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, US, 2007, pp. 472-473 (Non-Patent Document 1).
As an example of conventional techniques, FIG. 16 shows the relation between the pulse width and temperature required for phase change in a resistive storage element (phase-change memory cell) using a phase-change material. When storage information ‘0’ is to be written to this storage element, a reset pulse (1601) that heats the element to a melting point Ta of the chalcogenide material or higher and then rapidly cools the element is applied. By setting the cooling time t1 to be short, for example, about 1 ns, the chalcogenide material is brought to a high-resistance amorphous (non-crystalline) state. Reversely, when storage information ‘1’ is to be written, by applying a set pulse (1602) that keeps the storage element within a temperature range lower than the melting point Ta and higher than a crystallization temperature Tx, which is equal to or higher than the glass-transition point, the chalcogenide material is brought to a low-resistance polycrystalline state. The time t2 required for crystallization is different depending on the composition of the chalcogenide material. The temperatures of the element shown in FIG. 16 depend on the Joule heat generated by the storage element itself and the heat diffusion to the surrounding area.
As described in IEEE International Electron Devices meeting, TECHNICAL DIGEST, US, 2001, pp. 803-806 (Non-Patent Document 2), in a phase-change memory, if a resistive element structure becomes small, the electric power required for changing the state of a phase-change film becomes small. Therefore, in principle, this is suitable for miniaturization and has been actively studied.
IEEE JOURNAL OF SOLID-STATE CIRCUIT, VOL. 40, No. 1, JANUARY 2005, US, 2005, pp. 293-300 (Non-Patent Document 3) describes a phase-change memory that requires the time of about 120 ns for reducing the resistance of a chalcogenide material and the time of about 50 ns for increasing the resistance thereof.